#1633 - SoC DFT Engineer (Junior and Senior Level)
|Job Title||SoC DFT Engineer (Junior and Senior Level)|
|Job Description||Job Description
Candidate will focus on architecting DFT solutions for highly complex chips, design and implementation of DFT features, DFT verification and delivering high quality tester patterns.
Training: technical and non-technical skills 13th month of salary committed
Company activities: company trip, year-end party, team-building, birthday, happy hours, sport clubs – football, yoga, badminton, chess…, long service award, employee of the year…)
DFT implementation experience on complex SOC and/or IP. Practical experience with the following, DFT features:
• Scan and compression design and validation
• Clocking schemes and timing constraintsoIEEE 1149.1 JTAG and TAP controller
• MBIST design, implementation and verification
• Experience in debug and test of silicon based products.
• Must have gone through complete process of generation and debug of test vectors on a tester
• Some experience with designing/dealing with manufacturing test requirements.
• Ability to work as an individual and as part of a team to deliver a product which is debug and test friendly starting from the creation of the spec, design, verification, and finally to productization.
• Ability to deal with DFx integration of complex IP's from different sources onto the same piece of silicon.
• BA/BS degree in engineering (ex. Electronic, Electrical, Information, Communication etc) or equivalent practical experience in semiconductor industry.
• 6+ years of experience in ASIC/SoC DFT Implementation.
Ms. Chi Nguyen